Cambridge, UK | Full-time or Part-time | Permanent (or Temporary) | Hybrid Salary: £90,000 to £115,000 DOE
The salary range for this role is broad, as we are able to consider varying levels of experience. Any offer made will carefully take into account level of experience (including relevant industry experience), transferable relevant skills and previous relevant achievements.
About us
Riverlane’s mission is to master quantum error correction (QEC) and unlock a new age of human progress. From advances in material and climate science, to complex chemistry simulation for new drug design, quantum computers will help humanity solve some of its most important challenges. But without QEC, the industry’s defining technical challenge, such breakthroughs can never be achieved. Riverlane is the world leader in QEC technology. QEC is a complex problem that requires a range of skills, talent and passion.
Having raised more than $125M in funding to date to accelerate our cutting-edge R&D in quantum error correction (QEC), Riverlane partners with many of the world’s leading quantum hardware providers and government agencies to make fault-tolerant quantum computing a reality. We’re making remarkable progress and growing fast.
About the role
Riverlane’s overarching mission is making quantum computing useful sooner. Different quantum architectures require different solutions to quantum error correction. We are seeking a technical leader for our new software-based quantum error correction stack, DF-AMO. DF-AMO targets scalability whilst preserving the flexibility required to support Atomic Molecular Optical (AMO) systems (Ion Traps, Cold Atoms). It is designed to be driven by Deltakit, our software SDK, and complement Deltaflow, our solid-state systems solution.
What you will do
As Technical Lead for DF-AMO, you will own the technical development of this new product, working closely with engineering, research, product, and customer teams. You will turn our industry-leading decoding technology into a scalable, production-ready system, helping shape both the technical roadmap and future product direction. You will evaluate technical trade-offs to manage system performance, maintainability and scalability, in a domain where latency and throughput are key requirements. You will mentor and develop a growing team of 5+ engineers, fostering a culture of collaboration and delivery.
What we need:
- Proven experience in leading small to medium technical efforts (5+ people)
- Excellent software skills, particularly in C++, with Python experience also being beneficial
- Comfortable learning quantum error correction fundamentals to enable close collaboration with our QEC research teams
- Experience delivering complex software products from concept through to deployment and customer adoption
- Experience line managing other engineers
- Strong ability to collaborate and communicate with a diverse team
- Expert-level understanding in at least one of the following areas:
- Performant multi-process software
- Modern compiler infrastructures
- GPU-accelerated computing
What can you expect from us
- A comprehensive benefits package that includes an annual bonus plan, private medical insurance, life insurance, and a contributory pension scheme
- Equity, so that our team can share in the long-term success of Riverlane
- 28 days annual leave, plus bank holidays and enhanced family leave
<li data-leveltext="" data-font="Symbol" data-listid="22" data-list-defn-props="{"335552541":1,"335559685":720,"335559991"
